Performance Analysis of Different Multipliers for Embedded and DSP Applications

This Paper presents an efficient implementation of high speed multiplier using the shift and add method, Radix_2, Radix_4 modified Booth multiplier algorithm. In This paper we compare the working of the three multipliers by implementing each of them separately in FIR filter. The parallel multipliers like radix2 and radix4 modified booth multiplier does the computations using lesser adders and lesser iterative steps. As a result of which they occupy less space as compared to the serial multiplier. This a very important criteria because in the fabrication of chips and high performance systems requires components which are as small as possible. Low power consumption and smaller area are the most important criteria for the fabrication of DSP systems and high performance systems. Optimizing the speed and area of the multiplier is a major design issue. However, area and speed are usually conflicting constraints improving speed results mostly in larger areas. This is to determine the best solution to this problem by comparing a few multipliers. The paper gives the analysis of comparison of power consumption of all the multipliers & we find that serial multipliers consume more power. So where power is an important criteria parallel multipliers like booth multipliers are preferred to serial multipliers.